DATE 2026

DATE 2026
2026 Design, Automation & Test in Europe Conference
Event in series	DATE
Dates	2026/04/20 (iCal) - 2026/04/22
Homepage:	https://date26.date-conference.com/
Location
Location:	Verona, Italy
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Accepted short papers:	91
Papers:	Submitted 1310 / Accepted 325 (24.8 %)
Table of Contents

Call for Papers

The DATE conference is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in hardware and software design, test, and manufacturing of electronic circuits and systems. DATE places a strong emphasis on both technology and systems, covering ICs/SoCs, reconfigurable hardware, and embedded systems, as well as embedded software.

Conference Scope

The conference addresses all aspects of research into technologies for electronic and systems engineering. It covers the design process, test, and tools for design automation of electronic products, ranging from integrated circuits to distributed large-scale systems. This domain includes both hardware and embedded software design issues. The conference scope also includes the specification of design requirements and new architectures for challenging application fields such as sustainable computing, smart societies and digital wellness, secure systems, autonomous systems and smart industry, and state-of-the-art applications of artificial intelligence. Engineers, scientists, and researchers involved in innovative industrial designs are particularly encouraged to submit papers to foster feedback ranging from design to research aspects.

Research Papers – D, A, T, and E tracks

DATE seeks submissions of original, unpublished scientific work in one of its four research tracks (D, A, T, and E), each organised by topics, whose list is provided below. Scientific papers will be evaluated with regard to their suitability for the conference, originality, and technical soundness. They require novel and complete research work supported by experimental results. Accepted papers will be published in the conference proceedings and will be presented in technical sessions at the conference and through pre-recorded video presentations. The technical sessions include short pitch presentations, followed by live interactions with a poster and/or demo. The Technical Programme Committee reserves the right to accept submissions as extended abstracts to be published in the proceedings and presented at the conference.

Within the scope of the conference, the main areas of interest are organised along the following tracks. Submissions can be made to any of the track topics.

Track D: Design Methods and Tools, addresses design automation, design tools, and Hardware architectures for electronic and embedded systems. The emphasis is on methods, algorithms, and tools related to the use of computers in designing complete and complex systems. The track’s focus includes significant improvements on existing design methods and tools, as well as forward-looking approaches to model and design future system architectures and design flows.

This track is organised in the following topics:

• D1 System-level design methodologies and high-level synthesis
• D2 System simulation and validation
• D3 Formal methods and verification
• DT4 Design and test for analogue and mixed-signal circuits and systems, and MEMS
• DT5 Design and test of hardware security primitives
• DT6 Design and test of secure systems
• D7 Network on chip and on-chip communication
• D8 Architectural and microarchitectural design
• D9 Low-power, energy-efficient and thermal-aware design
• D10 Approximate computing
• D11 Reconfigurable systems
• D12 Logical analysis and design
• D13 Physical analysis and design
• D14 Emerging design technologies for future computing
• D15 Emerging design technologies for future memories
• D16 Design Automation for Quantum Computing

Track A: Application Design, is devoted to the presentation and discussion of design experiences with a high degree of industrial relevance,real-world implementations, and applications of specific design and test methodologies. Contributions should illustrate innovative or record-breaking design and test methodologies, which shall provide viable solutions in tomorrow’s silicon, embedded systems, and large-scale Systems.

This track is organised in the following topics:

• A1 Power-efficiency and Smart Energy Systems for Sustainable Computing
• A2 Smart Society and Digital Wellness
• A3 Secure Systems, Circuits and Architectures
• A4 Autonomous Systems and Smart Industry
• A5 Applications of Emerging Technologies
• A6 Applications of Artificial Intelligence Systems

Track T: Test and Dependability, covers all test, design-for-test, reliability, and design-for-robustness issues, at system-, chip-, circuit-, and device-level for both analogue and digital electronics. Topics of interest also include diagnosis, failure mode analysis, debug and post-silicon Validation challenges, and test and fault injection methods addressing system security.

This track is organised in the following topics:

• T1 Modelling and mitigation of defects, faults, variability, and reliability
• T2 Test generation, test architectures, design for test, and diagnosis
• T3 Dependability and system-level test
• DT4 Design and test for analogue and mixed-signal circuits and systems, and MEMS
• DT5 Design and test of hardware security primitives
• DT6 Design and test of secure systems

Track E: Embedded Systems Design, is devoted to the modelling, analysis, design, verification and deployment of embedded software or embedded/cyber-physical systems. Areas of interest include methods, tools, methodologies and development environments for real-time systems, cyber-physical systems, networked systems, and dependable systems. Emphasis is also on model-based design and verification, embedded software platforms, software compilation and integration for these systems.

This track is organised in the following topics:

• E1 Embedded software architecture, compilers and tool chains
• E2 Real-time, dependable and privacy-enhanced systems
• E3 Machine learning solutions for embedded and cyber-physical systems
• E4 Design methodologies for machine learning architectures
• E5 Design, specification, modelling and verification for embedded and cyber-physical systems